You are viewing a preview of this job. Log in or register to view more details about this job.

Senior ASIC Design Engineer

Position Description
We seek a motivated Senior ASIC Design Engineer to join our team as a lead ASIC designer. In this role, you will design, develop, and build analog, digital and mixed-mode ASICs for instruments developed for BNL and our partners. You will collaborate with a diverse, multi-disciplinary group of scientists, engineers, and other technical team members in our ASIC team, the Instrumentation Division and across the entire community at BNL and elsewhere. We look for candidates from a broad range of ASIC design expertise from base-band analog, RF, digital, data converters, data transmission and sensors.

Our science and engineering challenges are complex and unique! We are engaged in the development of ASICs for particle detectors, high resolution X- and gamma-ray spectrometers, and high-rate photon counters and imagers. Our ASICs work in extreme environments (such as cryogenic temperatures) or must withstand extreme irradiation doses, thus represent unique layout challenges. We are also actively carrying out R&D programs focused on Quantum Information Science, Artificial Intelligence & Machine Learning, and Neuromorphic Processing that require ASICs with specific layouts. The applications of these ASICs extend beyond BNL to a variety of international user facilities: your work will have the potential to shape the instruments used for scientific discovery and engineering advancements across the globe!

Essential Duties and Responsibilities:
  • Create innovative solutions and inspire new circuits design
  • Spearhead the adoption of novel microelectronics technologies
  • Take a lead role in the design of analog, digital or mixed-mode (i.e. analog-digital) ASICs for scientific instruments 
  • Develop design specifications based on theoretical analyses and in conjunction with application needs and carry out complex and independent design activities, including oversight of efforts of team members
  • Design circuit networks, using schematic entry and layout tools with full-custom or timing-driven layout tools in Cadence or similar CAD/EDA environment
  • Develop models of circuit networks and system components in hardware description languages specific for analog or digital modeling (Verilog-A and Verilog/SystemVerilog)
  • Perform full-custom or automated from RTL code physical ASIC design implementation
  • Build analog or digital test-benches and carry-out mixed analog and digital circuit simulations
  • Lead project documentation, test-board designs, and laboratory testing
  • Engage in codesigning of ASICs and sensors with Technology CAD tools, developing ideas in appealing directions in machine learning, artificial intelligence, quantum science and others
  • Construct new project initiatives and develop proposals, making use of emerging technologies

(The selected candidate will be placed at the appropriate level based on the depth and breadth of relevant engineering knowledge, skills and experience.)

Required Knowledge, Skills, and Abilities:
  • Bachelor's degree in an engineering, physical sciences discipline or closely related field of study
  • Minimum seven (7) years progressively responsible related work experience
  • Familiarity with specificity of ASIC design processes and flows
  • Familiarity with CAD/EDA tools for ASIC design and their interoperability
  • Ability to work with group members in a multi-user process and design managed environment, and step up to challenges
  • Readiness for working on challenging projects that may have tight schedules

Preferred Knowledge, Skills, and Abilities:
  • Advanced degree (MSc or PhD) in an engineering, physical sciences discipline or closely related field of study
  • Knowledge of readout integrated circuits for radiation sensors, including signal processing, signal filtering, signal conversion, data transmission, high speed electronics
  • Sound background of solid-state circuits and integrated circuit design
  • Ability to execute analog and/or digital ASIC design flows for performing design tasks
  • Knowledge of front-end and back-end ASIC design elements, such as layout, physical verification, and design verification
  • Ability of working with SKILL, Tcl/Tk, ASSURA and Calibre DRC/LVS verification decks syntax as well as operating system shell scripting or other scripting languages, such as Perl and Python